In many semiconductor devices, such as field effect transistors (FETs), heterojunction field effect transistors (HFETs), and similar devices incorporating control terminals, the speed of the device and, hence the operating frequency, is at least partially determined by the control terminal area. That is, the smaller (narrower) the control terminal the higher the speed and operating frequency of the device.
In the prior art many attempts have been made to fabricate semiconductor devices with very small control terminals. The primary method of fabricating small control terminals in a semiconductor device is to utilize E-beam technology to draw the gate or control terminal in masking material, such as photoresist or other masking material. However, E-beam technology is extremely expensive and its through put is very small, making the manufacturing process very expensive and slow.
Some other methods have been suggested in the literature, including precise undercut etching or angle evaporation to define very small control terminals. However, these methods are very difficult to perform, involving many complicated process steps, and generally have low repeatability so that the devices fabricated are not reliable or consistent.
Accordingly, it is highly desirable to devise a fabrication process for submicron features in semiconductor devices which is simple, inexpensive and repeatable.
It is a purpose of the present invention to provide a new and improved method of fabricating submicron features in semiconductor devices.
It is another purpose of the present invention to provide a new and improved method of fabricating submicron features in semiconductor devices which is relatively inexpensive and simple to perform.
It is a further purpose of the present invention to provide a new and improved method of fabricating submicron features in semiconductor devices which is highly repeatable and provides highly reliable and consistent semiconductor devices.